Jing He Wafer Fab Project in Heifei held its roof-sealing Ceremony

date: 2016-11-17

On 16th November 2016, CEEDI’s EPC project – Phase I of Jing He Wafer Fab Project in Heifei held its roof-sealing Ceremony. Director of Taiwan Affairs Office of Anhui Province, deputy secretary of Anhui Municipal Committee of CPC, deputy director of Economic Dept. of Taiwan Affairs Office of the State Council, president of Powerchip Semiconductor Corp., founder and president of Powerchip Technology, CEEDI’s president presented at the ceremony. 

Zhang Dingyuan, CEEDI’s president, addressed that the roof-sealing is not only a milestone of the project, but also a milestone of establishing semiconductor chain at 100-billion level in Hefei. He emphasized the project is an achievement cooperatively made by local government, state-owned enterprise and several international companies and also a great breakthrough of CEEDI in the field of semiconductor. Zhang thanked all the officials and the clients for their support to CEEDI and hope the project a great success.

Jing He Wafer Fab Project is the first 12” wafer fabrication project with total investment of approximately RMB 14 billion Yuan. It adopts 0.15 μm process to fabricate chip for large panel and 0.11μm and below for small panel.
               

               

               

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